A low-power multilevel-output classifier circuit

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IEEE

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info:eu-repo/semantics/closedAccess

Özet

A low power CMOS implementation of a multi-input data classifier with several output levels is presented. The proposed circuit operates in current-mode and can classify several types of analog vector data. An architecture is developed comprising a threshold circuit which operates in sub-threshold region. Using 0.351 mu m TSMC technology parameters, SPICE simulation results for a classifier with two inputs are included to verify the anticipated results.

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CMOS

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18th European Conference on Circuit Theory and Design, 2007. ECCTD 2007

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Yıldız, M., Minaei, S., and Göknar, İ. C. (2007). A low-power multilevel-output classifier circuit. 18th European Conference on Circuit Theory and Design, 2007. ECCTD 2007. (pp. 747-750). Seville, Spain, IEEE. https://dx.doi.org/10.1109/ECCTD.2007.4529704

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