Negative Impedance Inverter and All-pass Filter Realizations Using Adder and Subtractor Blocks
| dc.authorid | Minaei, Shahram/0000-0002-6921-9348 | |
| dc.authorid | YILDIZ, Merih/0000-0002-3991-7778 | |
| dc.authorwosid | YILDIZ, Merih/G-4512-2010 | |
| dc.authorwosid | Minaei, Shahram/G-5765-2010 | |
| dc.authorwosid | Göknar, İzzet Cem/G-4520-2010 | |
| dc.contributor.author | Minaei, Shahram | |
| dc.contributor.author | Yildiz, Merih | |
| dc.contributor.author | Goknar, Izzet Cem | |
| dc.contributor.author | Yuce, Erkan | |
| dc.date.accessioned | 2024-03-15T15:24:51Z | |
| dc.date.available | 2024-03-15T15:24:51Z | |
| dc.date.issued | 2014 | |
| dc.department | Doğuş Üniversitesi | en_US |
| dc.description | 57th IEEE International Midwest Symposium on Circuits and Systems (MWSCAS) -- AUG 03-06, 2014 -- College Station, TX | en_US |
| dc.description.abstract | In this paper, using newly introduced analog adder and subtractor circuits, a new negative impedance converter, a lossy inductor simulator and an all-pass filter structure are presented. The proposed configurations have very simple structures containing only one or two adder/subtractor blocks together also with one or two passive elements. All capacitors used are grounded which is beneficial from the integrated circuit point of view and absorption of parasitic capacitors of the active blocks. The non-ideal analyses for all of the proposed circuits are given. Design examples for realizing 10 mH inductances are presented and tested with SPICE. The simulations are based on level 49 TSMC 0.25 mu m process parameters. The designed inductances show good performance between a few ten kHz to a few MHz. In addition inverting and non-inverting all-pass filter examples providing 90 degree phase shift at 790 kHz are given. The presented all-pass filters have high-input and low-output impedances resulting in easy cascadability. Frequency responses of the proposed all-pass filters are simulated to verify the theoretical analysis. | en_US |
| dc.description.sponsorship | IEEE,IEEE Circuits & Syst Soc,Texas A & M Univ | en_US |
| dc.identifier.endpage | 570 | en_US |
| dc.identifier.isbn | 978-1-4799-4132-2 | |
| dc.identifier.issn | 1548-3746 | |
| dc.identifier.startpage | 567 | en_US |
| dc.identifier.uri | https://hdl.handle.net/11376/4682 | |
| dc.identifier.wos | WOS:000350205800142 | en_US |
| dc.identifier.wosquality | N/A | en_US |
| dc.indekslendigikaynak | Web of Science | en_US |
| dc.language.iso | en | en_US |
| dc.publisher | IEEE | en_US |
| dc.relation.ispartof | 2014 Ieee 57th International Midwest Symposium On Circuits and Systems (Mwscas) | en_US |
| dc.relation.publicationcategory | Konferans Öğesi - Uluslararası - Kurum Öğretim Elemanı | en_US |
| dc.rights | info:eu-repo/semantics/closedAccess | en_US |
| dc.subject | Adder | en_US |
| dc.subject | Subtractor | en_US |
| dc.subject | Filter | en_US |
| dc.subject | Negative Impedance | en_US |
| dc.subject | R-L | en_US |
| dc.subject | Voltage | en_US |
| dc.subject | Inductor | en_US |
| dc.title | Negative Impedance Inverter and All-pass Filter Realizations Using Adder and Subtractor Blocks | en_US |
| dc.type | Conference Object | en_US |












