A Sigma-Delta ADC design automation tool with embedded performance estimator

Abstract

A system-level design automation tool for designing discrete time, switched-capacitor, Sigma Delta analog-to-digital converters is presented. The presented work utilizes a performance estimator based on EKV models. The design automation tool takes advantage of high level analytical single-bit and multibit models of the building blocks. With the contribution of the performance estimator module, the tool provides an extensive design environment for designing Sigma-Delta analog-to-digital converters. Developed models and their effects are presented with examples. Design examples for 0.5 and 0.35 mu m technologies are provided for proving the flexibility of the design automation tool.