A novel super transistor-based high-performance CCII and its applications

Abstract

In this paper a high-performance low-voltage low-power CMOS second-generation current conveyor (CCII) is presented. The proposed CCII is based on super transistor (ST) and enables low input impedance at X terminal and high output impedance at Z terminal. It also utilizes a novel power saving strategy in which a single NMOS cascode current mirror conveys X terminal current to Z terminal, provides high impedance at Z terminal and reduces the X terminal impedance all together resulting in a low-power and compact structure. As another advantage, only NMOS transistors are used in processing voltage and current signals granting the proposed CCII high frequency operation. PMOS transistors are used only for biasing. However, the proposed CCII cannot provide infinite impedance at Y terminal. HSPICE simulations using 0.18 µm parameters and supply voltage of ±0.9 V confirms that the proposed CCII exhibits impedances of 0.155 Ω, 1.6 MΩ and 47 kΩ at X, Z and Y terminals, respectively. Voltage and current bandwidths are also 377 MHz and 159 MHz, respectively. Some of the applications of the proposed CCII are given.