Advanced Search

Show simple item record

dc.contributor.authorMyderrizi, Indrit
dc.contributor.authorZeki, Ali
dc.date.accessioned2015-03-31T13:22:18Z
dc.date.available2015-03-31T13:22:18Z
dc.date.issued2010-10
dc.identifier.citationMYDERRIZI, I., ZEKİ, A. (2010). A 12 - bit 0.35 mu m CMOS area optimized current - steering hybrid DAC. Analog Integrated Circuits and Signal Processing, 65 (1), pp. 67-75. https://dx.doi.org/10.1007/s10470-009-9448-x.en_US
dc.identifier.issn0925-1030
dc.identifier.other000282012800007 (WOS)
dc.identifier.urihttps://dx.doi.org/10.1007/s10470-009-9448-x
dc.identifier.urihttps://hdl.handle.net/11376/1253
dc.description.abstractIn this paper a 12-bit current-steering hybrid DAC is implemented using AMS 0.35 mu m CMOS process technology. The architecture and design methodology used for the implementation of the DAC offer advantages like design speed up, easiness in design and a small active area. The proposed hybrid DAC consists of four 3-bit parallel matched current-steering subDACs and resistive networks that properly weight the current output of each subDAC to obtain the overall voltage-mode output of the 12-bit hybrid DAC. The performance of the hybrid DAC is validated through static and dynamic performance metrics. Simulations indicate that the DAC has an accuracy of 12-bit and a SFDR higher than 66 dB in whole Nyquist frequency band. The simulated INL is better than 1 LSB, while simulated DNL is better than 0.25 LSB. At an update rate of 250 MS/s the SFDR for signals up to 10 MHz is higher than 66 dB. The Figure of Merit (FoM) of the implemented hybrid DAC is better than recently presented DACs with 12-bit resolutions and implemented using various process technologies. The proposed hybrid DAC supporting high update rates with good dynamic performance can be used as an alternative in various applications in industry including video, digital TV, cable modems etc.en_US
dc.language.isoengen_US
dc.publisherSpringeren_US
dc.identifier.doi10.1007/s10470-009-9448-xen_US
dc.rightsinfo:eu-repo/semantics/closedAccessen_US
dc.subjectACen_US
dc.subjectCurrent - Steeringen_US
dc.subjectHybriden_US
dc.subjectActive Areaen_US
dc.subjectCMOS Processen_US
dc.subjectD/A Converteren_US
dc.titleA 12 - bit 0.35 mu m CMOS area optimized current - steering hybrid DACen_US
dc.typearticleen_US
dc.relation.journalAnalog Integrated Circuits and Signal Processingen_US
dc.departmentDoğuş Üniversitesi, Mühendislik Fakültesi, Elektronik ve Haberleşme Mühendisliği Bölümüen_US
dc.authoridTR128369en_US
dc.identifier.volume65en_US
dc.identifier.issue1en_US
dc.identifier.startpage67en_US
dc.identifier.endpage75en_US
dc.relation.publicationcategoryMakale - Uluslararası Hakemli Dergi - Kurum Öğretim Elemanıen_US
dc.institutionauthorMyderrizi, Indrit


Files in this item

Thumbnail

This item appears in the following Collection(s)

Show simple item record