On the realization of simulated inductors with reduced parasitic impedance effects
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CitationYüce, E., & Minaei, S. (2009). On the realization of simulated inductors with reduced parasitic impedance effects. Circuits Systems and Signal Processing , 28(3), 452-465. https://dx.doi.org/10.1007/s00034-008-9093-0
In this paper, a method for reducing the parasitic impedance effects of the current feedback operational amplifiers (CFOAs) in an inductor simulator at low frequencies is proposed. Also, two novel grounded inductors employing a current follower (CF) and a second generation current conveyor (CCII) are given to illustrate the parasitic reduction technique clearly. The low frequency restrictions of the proposed inductors due to terminal parasitic resistances can be improved by using the presented parasitic impedance reduction technique. SPICE simulations show that the presented inductor employing CFOAs in a voltage-mode (VM) band-pass and high-pass filter application has lower parasitic effects at low frequencies. In addition to simulation results, experimental test results are given to verify the theory.