Realization and extensions of user programmable, single - level, double - threshold generalized prceptron
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CitationAKSIN, Y.D., ARAS, S., GÖKNAR, İ.C., (2002). Realisation and extensions of user programmable, single-level, double-threshold generalized perceptron. İstanbul Üniversitesi Mühendislik Fakültesi Elektrik-Elektronik Dergisi, Cilt 1, Sayı 1, 123-129.ss.
The implementation of a perceptron that can classify data separable by two parallel hyper-planes or equivalently of a Single-Level TL-XOR gate is proposed using 10 MOS transistors and 2 capacitors. The functional subblock decomposition of the Perceptron with two separating hyper-planes, its CMOS implementation explaining the operation of each sub-block and simulation results, obtained using the pectreS simulator and AMS 0.8mm CMOS double-poly double-metal technology parameters are presented. A brief outline of the two level CTL realization and its comparison with the new implementation are given as far as their transistor count, programmability and total delay are concerned.